Tuong Q. Phung

Multidisciplinary engineer working from silicon to systems.

AustraliaOpen to hardware and embedded engineering opportunities

Tuong Q. Phung portrait

Selected work and study / 2023—2026

01

FPGA and Digital Architecture

Reconfigurable compute, accelerators, and digital signal processing.

CGRA on FPGA

A coarse-grained reconfigurable array that combines parallel FPGA execution with instruction-based reconfiguration.

LeNet-5 CNN Accelerator

An FPGA accelerator that maps the convolution, pooling, and classification stages of LeNet-5 into a hardware datapath.

Zynq-7010 SoC PCB

A 10-layer impedance-controlled board integrating DDR3L, eMMC, QSPI flash, Gigabit Ethernet, and sequenced multi-rail power.

5.5 GHz Pulse Compression Radar

An ongoing radar hardware and signal-processing platform exploring pulse compression at 5.5 GHz.

No verified projects yet.

Zynq-7010 SoC PCB

A 10-layer impedance-controlled board integrating DDR3L, eMMC, QSPI flash, Gigabit Ethernet, and sequenced multi-rail power.

Predictive Maintenance ML Platform project documentation

Predictive Maintenance ML Platform

An end-to-end concept for equipment health monitoring, combining time-series modelling, anomaly detection, remaining-useful-life estimation, experiment tracking, and production model serving.

Two-Stage CMOS Operational Amplifier project documentation

Two-Stage CMOS Operational Amplifier

A concept design and simulation study of a two-stage CMOS operational amplifier, focusing on biasing, gain, frequency compensation, stability, and process-corner analysis.

Research notes and experiments will be added here.